In electronic device fabrication, substrates often have shallow trench isolation (STI) structures used, for example, to isolate different devices formed on the semiconductor wafer. The STI structures may have different aspect ratios of depth of the feature to the width of the structure. One challenge of fabricating, or etching, shallow trench isolation (STI) structures in a substrate is a difference in etch rate, referred to as micro-loading, between high aspect ratio structures and low aspect ratio structures. Micro-loading manifests itself as differences in feature profile and etch depth between high aspect ratio features and low aspect ratio features on a substrate in which the features are being etched. For example, in some processes, low aspect ratio features may be etched at a faster rate, and thus to a greater depth than an etch depth corresponding to the high aspect ratio features, a process known as aspect ratio dependent etching (ARDE). Controlling microloading is important, as certain applications (such as NAND flash) require high microloading, while other applications (such as DRAM) require low to minimal micro-loading.
Accordingly, the inventors have provided improved methods of etching a substrate having high aspect ratio features and low aspect ratio features while reducing aspect ratio dependent etching.